HFT Solutions, LLC v. Citadel Securities LLC, (N.D. Ill. Dec. 1, 2025) (Coleman, J.)
Judge Coleman denied defendant Citadel’s Fed. R. Civ. P. 12(b)(6) motion to dismiss HFT’s patent case holding that the asserted field programmable gate array (FPGA)-based claims plausibly recite a specific technological improvement and are not directed to an abstract idea under Section 101. FPGAs are microchips that allow for rapid data processing by spreading computations across a chip with “massive fine-grained parallelism.”
The asserted method and system claims, centered on FPGA architectures that use a phase-locked loop to synchronize clock signals and reduce latency. As an initial matter, the Court accepted Citadel’s argument that identified claims were representative of all of the claims, in part because plaintiff HFT did not challenge Citadel’s assumption. Citadel also showed the claims were substantially similar and linked to the same concept. The Court then applied the Alice framework to the representative claims concluding that at step one of the Alice analysis the claims are directed to a concrete improvement in computer technology, not generic “data manipulation” or “synchronizing data processing with a clock.”
Even if abstract, the Court held the claims would survive Alice step two because they recite a non-conventional arrangement of known components—an inventive concept—aimed at solving latency issues inherent in prior art FPGA systems